Following lists the 100 Tips and Techniques for Electronic Hardware Design Engineer to practice High speed digital design fundamentals in their designs:
- First High speed digital design fundamentals : Signal Rise time is very crucial (The only reason )as it has its major role in reflections, crosstalk and EMI
- Second High speed digital design fundamentals: Printed Circuit Board consists of only three things: Resistance, Capacitance and Inductance
- Third High speed digital design fundamentals: V = L x di/Tr; Simple equation, yet very useful to understand effects of Rise Time (Tr)
- Fourth High speed digital design fundamentals: Symptoms of signal integrity issue:
- Failing EMI/EMC Tests
- Design failing intermittently
- Design fails after changing ICs, PCB manufacturer or even New IC of same part number
- Design has become hyper sensitive to Power supply variation
- Design becoming sensitive to temperature variation
- Design works in Hardware lab but not in the field
- Fifth High speed digital design fundamentals: Following modifications should be done only after understanding effects of those on Signal integrity:
- Relative dielectric
- Board Thickness
- Board fabricators
- IC replacement from other vendor
- Sixth High speed digital design fundamentals: Keep always in mind the following:
- Current is the flow of Electrons
- Current flows in a closed loop
- Current is constant everywhere in the loop
- Every signal has to return
- Seventh High speed digital design fundamentals: Hardware Designer must and should know where the return signal path is. If not the return current will take the designer on a big ride causing all the signal integrity issues
- Eight High speed digital design fundamentals: Spend time on both routing traces (50%) and return paths (50%). Latter part is seldom spent!
- Ninth High speed digital design fundamentals: Reference planes(Power or Ground) provide the best possible good signal integrity performance
- Tenth High speed digital design fundamentals: Planes helps to:
- Control EMI
- Stabilize trace impedance
- Control Crosstalk
- Provides high frequency decoupling
- Eleventh High speed digital design fundamentals: Minimize inductance. Minimize inductance. Minimize inductance across pads, vias, soldered connections and traces
- Twelfth High speed digital design fundamentals: Problem will not occur ‘Often’ if one doesn’t follow signal integrity disciplines. But Occurs one time or the other
- Thirteenth High speed digital design fundamentals: Having knowledge of each and every trace with respect to its frequency, amplitude, rise time etc helps the circuit designer to decide whether there will be a crosstalk issue. But best thing is to follow the Signal integrity principles in general. Saves time
- Fourteenth High speed digital design fundamentals: Don’t plan testing the system for proper design. Design the system properly
- Fifteenth High speed digital design fundamentals: Trade off, if needs to be done, be alert and do consciously.
- Sixteenth High speed digital design fundamentals: As electron flow around the trace, a magnetic field is generated around the trace or wire
- Seventeenth High speed digital design fundamentals: There will be both electric field and magnetic field around a wire carrying signal. They both decide the speed the electrons will travel, speed with which the current will flow.
- Eighteenth High speed digital design fundamentals: We can make use of the field in the way we want. We can maximize the effect when we want to transmit a signal and minimize the effect when we don’t want
- Nineteenth High speed digital design fundamentals: Transmissions we don’t want are called EMI
- Twentieth High speed digital design fundamentals: A good transmitting antenna is also a good receiving antenna; if the trace is radiating more, it will also be susceptible to external energy as it is also a good receiver
- Twenty first High speed digital design fundamentals: Magnetic flux curl around the current carrying conductor
- Twenty second High speed digital design fundamentals: A signal and its return have magnetic fields that approximately cancel. Cancellations happen at greater degree if they are brought closer
- Twenty third High speed digital design fundamentals: A twisted pair, hence have fairly good EMI performance
- Twenty fourth High speed digital design fundamentals: Return current always flow in low impedance. They may not in the path you think!
- Twenty fifth High speed digital design fundamentals: Coupling between two current carrying conductors is proportional to square of distance between them. Keep them away and all are safe. It can vary from 0 to 1. Nominal: 0.4 to 0.6
- Twenty sixth High speed digital design fundamentals: Coupling coefficient also has good effects which is more helpful in differential signalling
- Twenty seventh High speed digital design fundamentals: Loop area, the main parameter which decides the level of EMI/EMC. It is defined by the signal as it travels down the trace and returns back to the source. Hence it is important to know where the return current is flowing
- Twenty eight High speed digital design fundamentals: Minimize EMI. Minimize loop area
- Twenty ninth Slots in the plane if carrying a signal over it will have increased loop area. Avoid them.
- Thirtieth Have alternate ground pins in the connectors. Helps reduce Loop areas
- Thirty first High speed digital design fundamentals: Good practice includes providing copper paths between through hole pins and assigning pins to minimize loop areas
- Thirty second High speed digital design fundamentals: High speed return signal don’t know anything about DC voltage. The main common proof to this point is that all the bypass capacitors shorts DC voltage plane (power plane) and ground plane.
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Thirty third High speed digital design fundamentals: The 20-H rule states that all the power planes must be recessed by a factor of 20-H compared to ground plane, where H is thickness of the board. This is not particularly effective.
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Thirty fourth High speed digital design fundamentals: The 20-H rule states that all the power planes must be recessed by a factor of 20-H compared to ground plane, where H is thickness of the board. This is not particularly effective.
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Thirty fifth High speed digital design fundamentals: Stubs create problems
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Thirty sixth High speed digital design fundamentals: Placing high speed signals in the strip line environment adds a measure of safety over EMI but most important thing is keeping the loop area as less as possible.
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Thirty seventh High speed digital design fundamentals: If the bypass capacitors are spread across the board and for every signal layer there is a reference plane there is nothing much to worry about high speed signal transiting between different trace layers.
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Thirty eighth High speed digital design fundamentals: Don’t route traces over and related planes. Example: High speed digital signal being routed over an analog plane.
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Thirty ninth High speed digital design fundamentals: Either ground plane or a power plane can give a stable return path.
